Keithley 2767 Pulse free download

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A G R E AT E R M E A S U R E O F C O N F I D E N C E anisms is the key to understanding channel mobility degradation and device reliability problems. However, traditional DC testing techniques may not accurately characterize these mechanisms. Limitation of DC Characterization Techniques As charges are trapped in the gate dielec- tric, the threshold voltage of the transistor increases due to the built-in voltage in the gate capacitor; therefore, the drain current decreases. It appears that charge trapping and de-trapping times strongly depend on Pulsed the composition of the gate stacks, i.e., physi- cal thickness of the interfacial SiO2 layer and high-k film, as well as process techniques Characterization [16-18]. The time scale varies from several microseconds to tens of milliseconds [19]. The de-trapping of the charges is also strong- of Charge-trapping ly gate voltage and polarity de